ZX Spectrum +3 Floppy Drive Interrupt Generation Explained

The Sinclair ZX Spectrum +3 integrated a floppy disk controller directly into its architecture, relying on specific hardware interrupts to manage data transfer efficiently. This article examines the technical pathway from the Western Digital WD1772 controller to the Z80 CPU, detailing how the Uncommitted Logic Array (ULA) facilitated communication and how the system ROM utilized these interrupts to coordinate disk operations without freezing the processor.

The core of the +3 disk system was the Western Digital WD1772 floppy disk controller (FDC). Unlike earlier Spectrum models that relied on cassette tapes and pure software timing, the +3 required a hardware mechanism to signal when disk operations were complete. The WD1772 was designed to assert an interrupt request signal whenever a commanded operation, such as reading a sector or seeking a track, finished execution or required attention. This hardware-based signaling was crucial for maintaining system stability and allowing the CPU to perform other tasks while waiting for mechanical disk operations.

Routing this signal to the processor involved the custom Uncommitted Logic Array (ULA) chip specific to the +3 model. The interrupt output from the WD1772 was connected to the ULA, which acted as the glue logic between the peripheral components and the Z80 CPU. The ULA managed the electrical signaling and ensured that the interrupt request was properly passed to the Z80’s INT pin. This connection allowed the FDC to trigger a maskable interrupt, distinguishing it from the Non-Maskable Interrupt (NMI) used for the reset button, ensuring that disk activities could be managed within the standard interrupt framework of the Z80 architecture.

On the software side, the +3 ROM contained specific routines designed to handle these interrupts during disk access. When a disk operation was initiated, the ROM would enable interrupts on the Z80 CPU. As the floppy drive performed its mechanical work, the CPU could halt or execute other code until the WD1772 completed its task. Upon completion, the FDC triggered the interrupt, causing the Z80 to jump to the designated interrupt service routine. This handler would then read the status registers of the FDC to confirm success or handle any errors before returning control to the main program.

This interrupt-driven approach marked a significant evolution in the Spectrum’s design, enabling faster and more reliable storage access compared to previous models. By offloading the timing constraints to the WD1772 and using the interrupt line for completion signaling, the +3 minimized CPU polling overhead. The collaboration between the WD1772, the custom ULA, and the Z80 interrupt structure ensured that the floppy drive operated smoothly within the limited resources of the 8-bit hardware environment.