Which Commodore 64 Chip Controls DRAM Refresh?

The Commodore 64 remains one of the most studied home computers in history, particularly regarding its unique memory architecture. Unlike modern systems with dedicated memory controllers, the C64 relied on its graphics chip to manage vital memory maintenance tasks. This article identifies the specific component responsible for DRAM refresh cycles and explains how this design choice influenced the machine’s overall stability and speed.

The Role of the VIC-II Chip

The specific chip in the Commodore 64 that controlled the DRAM refresh cycles is the VIC-II, also known as the Video Interface Chip. Manufactured by MOS Technology, this component was primarily designed to generate the video signal for the display. However, within the C64 architecture, the VIC-II also assumed the responsibility of memory management that is typically handled by a separate memory controller in other computer designs. The specific part numbers for this chip were the 6567 for NTSC systems and the 6569 for PAL systems.

How DRAM Refresh Works on the C64

Dynamic Random Access Memory (DRAM) requires constant electrical refreshing to retain data, as the storage capacitors leak charge over time. In the Commodore 64, the VIC-II generates the necessary RAS (Row Address Strobe) and CAS (Column Address Strobe) signals to perform this refresh. The chip utilizes a method known as cycle stealing, where it temporarily halts the main CPU to access the memory bus. During these brief intervals, the VIC-II ensures that all memory rows are refreshed without losing data integrity.

Impact on CPU Performance

Because the VIC-II controls the memory bus for refresh cycles and video data fetching, the main CPU, a MOS 6510, is frequently idle. The graphics chip takes priority over the bus to ensure the screen display remains stable and memory is preserved. This architecture means the CPU only has access to the memory bus during specific cycles when the VIC-II is not drawing pixels or refreshing DRAM. While this design limited the raw processing speed available to software, it allowed for a cost-effective motherboard layout by eliminating the need for additional support logic.

Conclusion

In summary, the VIC-II video chip is the hardware component responsible for controlling DRAM refresh cycles in the Commodore 64. This integration of video generation and memory maintenance was a key engineering decision that defined the system’s capabilities. Understanding the role of the VIC-II provides essential insight into why the C64 performed the way it did and how it managed to remain reliable despite its simplified hardware design.