Understanding the Commodore 128 Bank Select Register

The Commodore 128 features a complex memory architecture that exceeds the direct addressing limits of its processors. This article explains the purpose of the bank select register, detailing how it allows programmers to switch between different 64KB memory maps to access RAM, ROM, and I/O areas efficiently. By managing these memory configurations, developers can utilize the full 128KB of random access memory available in the system despite the CPU’s inherent restrictions.

The 64KB Addressing Barrier

The primary CPU in the Commodore 128, the MOS 8502, is an 8-bit processor capable of addressing only 64KB of memory at any given time. This limitation stems from the 16-bit address bus, which yields 65,536 unique memory locations. However, the Commodore 128 hardware includes 128KB of physical RAM, along with various ROM cartridges and internal I/O chips. Without a mechanism to access memory beyond the 64KB window, half of the system’s RAM would remain unusable during standard operation.

The Role of the MMU and Banking

To overcome this hardware limitation, the Commodore 128 employs a Memory Management Unit (MMU). The bank select functionality is controlled through specific MMU registers, primarily located at address $FF00. When a programmer writes a specific value to this register, the MMU reconfigures the memory map visible to the CPU. This process is known as banking. By toggling bits within the control register, the system can swap different blocks of physical memory into the CPU’s addressable space.

Memory Map Configurations

The bank select register allows for several distinct memory configurations, commonly referred to as banks. Bank 0 is the default configuration used in native C128 mode, mapping basic RAM, Kernal ROM, and I/O into the 64KB space. Bank 1 is often utilized for CP/M operations or specific data storage, offering a different arrangement of RAM and ROM. There are also Banks 2 and 3, which provide further variations for specialized software needs. Switching between these banks allows a program to store data in one bank while executing code from another, effectively expanding the usable workspace.

Practical Programming Implications

For assembly language programmers, managing the bank select register is critical for high-performance applications. Direct manipulation of the MMU control register enables rapid context switching without the overhead of disk loading. However, care must be taken when switching banks, as changing the memory map can disconnect the CPU from the code currently executing if not handled correctly. Typically, programmers ensure that the code responsible for banking resides in RAM that remains common across all bank configurations or handle the switch within interrupt routines.

Conclusion

The bank select register serves as the gateway to the Commodore 128’s full memory potential. It bridges the gap between the 8502 CPU’s 64KB addressing limit and the machine’s 128KB physical memory capacity. Understanding how to manipulate this register is essential for developers aiming to create sophisticated software that leverages the unique hardware architecture of the Commodore 128.