How Does the Commodore 128 Handle Interlaced Video Modes?

The Commodore 128 utilizes a dedicated Video Display Controller (VDC) to manage interlaced video modes, primarily within its 80-column display setting. This article explores the technical mechanics behind the MOS 8563 chip, explaining how it splits video frames into odd and even fields to double vertical resolution. Readers will gain insight into the flicker trade-offs, register configurations, and the specific hardware capabilities that distinguish the C128’s high-resolution output from its predecessor’s standard graphics.

The core of the Commodore 128’s interlaced video capability lies in the MOS 8563 VDC chip, which powers the native 80-column text and graphics mode. Unlike the VIC-II chip used for 40-column output, the VDC was designed with business applications in mind, requiring sharper text and higher resolution. To achieve this, the chip can be programmed to operate in an interlaced mode where each complete video frame is composed of two separate fields drawn in alternating passes.

In standard non-interlaced mode, the VDC draws every horizontal line in a single pass, resulting in a vertical resolution of 200 lines in NTSC regions. When interlaced mode is activated via specific control registers, the chip alters the vertical sync timing. During the first field, the electron beam draws only the odd-numbered scan lines. During the second field, it draws the even-numbered scan lines, offset by half a scan line height. This process effectively doubles the perceived vertical resolution to 400 lines, allowing for smoother diagonals and finer text detail.

However, this increase in resolution comes with a visual trade-off known as flicker. Because each field is displayed alternately, static objects that occupy only a single scan line may appear to shimmer or disappear between refresh cycles. This phenomenon occurs because the phosphors on the CRT monitor decay slightly before the same line is redrawn in the next frame cycle. While less noticeable on modern LCDs with scanline emulation, this flicker was a common characteristic on original CRT monitors connected to the C128.

Programmers accessing this feature typically manipulated the VDC’s internal registers through I/O ports. By setting the interlace bit in the control register, the hardware automatically handled the field separation without requiring complex software timing loops. This hardware-level support made the Commodore 128 a unique machine in the 8-bit era, offering PC-like display qualities such as high-resolution interlaced graphics that were uncommon among contemporaries like the Commodore 64 or Apple II.