How Did the Sinclair QL Handle Interrupt Processing?

The Sinclair QL, launched in 1984, utilized a unique architecture centered around the Motorola 68008 microprocessor to manage system tasks. This article explores the specific mechanisms behind its interrupt processing, detailing how the custom Uncommitted Logic Array (ULA) chips coordinated hardware signals, managed the vertical blanking interval, and facilitated the preemptive multitasking environment known as SuperBASIC.

The Motorola 68008 Foundation

At the heart of the Sinclair QL was the Motorola 68008 CPU, an 8-bit external bus variant of the 16-bit 68000 processor. This CPU supported multiple interrupt levels, ranging from level 1 to level 7, allowing the system to prioritize different hardware requests. The QL primarily utilized interrupt level 2 for its main system timing and hardware coordination. This level was chosen to balance responsiveness with the need to allow critical code sections to execute without constant interruption, ensuring system stability during complex calculations or disk operations.

The Role of the Custom ULA

A defining feature of the QL’s interrupt architecture was the custom Uncommitted Logic Array (ULA). In early models, two ULAs were used, while later revisions integrated these functions into a single chip. The ULA was responsible for generating the video signal, scanning the keyboard matrix, and managing the serial I/O ports. Instead of having separate controllers for each of these functions request interrupts independently, the ULA aggregated these hardware events. It acted as the primary interrupt generator, sending a unified interrupt request signal to the CPU whenever a scheduled hardware task required attention.

Vertical Blanking and System Timing

The core rhythm of the Sinclair QL’s interrupt processing was tied to the video display’s vertical blanking interval (VBLANK). Depending on the region, the system operated at either 50Hz or 60Hz. At the end of every video frame, the ULA triggered an interrupt. This VBLANK interrupt was critical because it served as the system tick for the Quantum Disk Operating System (QDOS). By linking the main interrupt to the display refresh rate, Sinclair ensured that the system timer remained consistent with the visual output, preventing screen tearing and providing a reliable timebase for software operations.

Enabling Preemptive Multitasking

The interrupt handling routine was the engine behind the QL’s advanced preemptive multitasking capabilities. When the VBLANK interrupt occurred, the CPU paused the currently running task and executed the QDOS scheduler. This scheduler determined which job or process should receive CPU time next based on priority and time slices. Because this switching happened during every vertical blank interrupt, multiple programs could appear to run simultaneously. This was a significant departure from contemporary home computers that relied on cooperative multitasking or single-tasking environments.

Peripheral and Keyboard Interrupts

While the VBLANK drove the main scheduler, the ULA also managed interrupts for peripherals within the same framework. Keyboard scanning was performed periodically by the interrupt service routine, ensuring that key presses were registered without requiring the main program to poll the hardware constantly. Similarly, the two microdrive ports and RS232 serial ports relied on the ULA to buffer data and signal the CPU when bytes were ready for transfer. This centralized interrupt handling reduced the complexity of the motherboard design but placed a significant reliance on the custom ULA hardware to maintain system responsiveness.

Conclusion

The Sinclair QL handled interrupt processing through a tightly integrated partnership between the Motorola 68008 CPU and the custom ULA chip. By funneling hardware events through a unified interrupt request tied to the video vertical blanking interval, the system achieved reliable timing and robust preemptive multitasking. This architecture allowed the QL to punch above its weight class in terms of operating system sophistication, establishing a legacy that remains notable in the history of personal computing hardware design.