How Did the Commodore VIC-20 Generate Its System Clock

The Commodore VIC-20 generated its system clock signal using a main crystal oscillator connected directly to the Video Interface Chip (VIC), which then divided the frequency to drive the CPU and video circuitry. This article details the specific oscillator frequencies used for NTSC and PAL regions, explains the role of the MOS 6560 and 6561 chips in timing distribution, and outlines how the central processor received its synchronized clock phases.

At the heart of the timing system was a quartz crystal oscillator that provided the base frequency for the entire machine. For NTSC models, typically sold in North America and Japan, the main crystal operated at 14.31818 MHz. PAL models, used in Europe and Australia, utilized a slightly different crystal frequency of 14.1875 MHz to accommodate the different television broadcast standards. This raw oscillation signal was fed directly into the VIC chip, which served as the central hub for all system timing rather than relying on a separate clock generator chip.

The VIC chip, identified as the MOS 6560 for NTSC and the MOS 6561 for PAL, contained internal divider circuits that processed the main crystal frequency. Its primary responsibility was to generate the precise timing required for video output, including the color burst signal. To achieve this, the chip divided the main crystal frequency by four to produce the color clock, ensuring accurate color reproduction on composite monitors and televisions. This integration allowed the VIC-20 to maintain video stability without requiring complex external synchronization hardware.

To power the MOS 6502 microprocessor, the VIC chip further divided the main clock signal to produce the system clock phases known as Phi0 and Phi2. The CPU operated at approximately 1.023 MHz on NTSC machines and 1.108 MHz on PAL machines, derived by dividing the main crystal frequency by 14. The VIC chip output these non-overlapping clock phases to the processor, ensuring that the CPU and the video circuitry accessed memory without conflict. This method of clock generation ensured that the processor speed was always locked in sync with the video beam, preventing visual tearing or timing errors during operation.