Commodore Amiga 1200 Chip RAM and Fast RAM Memory Mapping
The Commodore Amiga 1200 utilizes a specific memory architecture managed by the AGA chipset to distinguish between Chip RAM and Fast RAM. This article explains the technical details of how the Agnus chip handles memory arbitration, the specific address ranges assigned to each memory type, and the implications for CPU and DMA access. Readers will gain an understanding of the 24-bit address bus limitations, the role of memory mapping in system performance, and how expansions alter the default memory configuration.
The Role of the Agnus Chip
At the heart of the Amiga 1200 memory management system is the Agnus chip, part of the Advanced Graphics Architecture (AGA) chipset. Agnus acts as the central memory controller and arbiter. It is responsible for granting access to the physical memory modules to either the Motorola 68EC020 CPU or the custom chipset components, such as Denise and Paula. This dual-access requirement defines the existence of Chip RAM, which must be accessible by both the CPU and the custom chips for graphics and audio DMA operations, and Fast RAM, which is reserved exclusively for the CPU.
Address Space Allocation
The Amiga 1200 operates on a 24-bit address bus, allowing it to address up to 16MB of physical memory. In the standard configuration, the first 2MB of this address space, ranging from $000000 to $1FFFFF, is designated as Chip RAM. This lower memory region is physically connected to the Agnus chip, enabling the custom hardware to fetch data directly for display processing without CPU intervention. Any memory expansion added via the trapdoor slot or PCMCIA interface is mapped as Fast RAM. This memory typically begins at address $200000 and extends upward, depending on the size of the expansion. Because this upper region is not connected to the Agnus DMA logic, it is invisible to the custom chips and accessible only by the processor.
CPU and DMA Arbitration
Memory mapping on the Amiga 1200 relies on a cycle-exact arbitration system. When the CPU requests access to Chip RAM, Agnus may withhold the bus if a custom chip requires it for DMA transfers, such as refreshing the display or playing audio samples. This process is often referred to as cycle stealing. Conversely, when the CPU accesses Fast RAM, Agnus does not intervene. Since the custom chips cannot address the Fast RAM region, the CPU enjoys full speed access without waiting for DMA cycles to complete. This distinction is critical for software optimization, as placing code and data in Fast RAM significantly improves execution speed compared to residing in Chip RAM.
Expansion and Memory Mapping
Adding memory to the Amiga 1200 requires careful mapping to ensure the system recognizes the distinction between Chip and Fast RAM. Trapdoor expansions often replace or augment the existing Chip RAM, while PCMCIA cards usually provide Fast RAM. The system ROM and Kickstart software initialize the memory map during boot, identifying the size of the Chip RAM based on the Agnus version and scanning the upper address space for valid Fast RAM expansions. If an expansion is incorrectly configured, it may overlap with the Chip RAM address space, causing system instability or preventing the custom chips from functioning correctly. Understanding this mapping is essential for users upgrading their hardware to ensure compatibility with software that relies on specific memory types.